The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 2023
Filed:
Jan. 11, 2022
Samsung Electronics Co., Ltd., Suwon-si, KR;
Hongda Lu, Austin, TX (US);
Sridhar Subramaniam, San Jose, CA (US);
Kok-Hoong Chiu, Austin, TX (US);
Abstract
A method of constructing a hierarchical clock tree for an integrated circuit may include constructing a clock distribution network on a first level, pushing the clock distribution network to a second level, implementing partition clock trees in partitions on the second level, and calculating combined timing of the clock distribution network and the partition clock trees on the second level. Implementing the partition clock trees may include constructing the partition dock trees in the partitions on the second level, calculating trial timing for the partition clock trees, calculating target timing constraints for the partition clock trees based on timing of the dock distribution network and the trial timing for the partition dock trees, and adjusting the timing of one or more of the partition clock trees based on the target constraints.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile