The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 2023
Filed:
Jun. 17, 2022
Fulian Precision Electronics (Tianjin) Co., Ltd., Tianjin, CN;
Hou-Fei Shang, Tianjin, CN;
Li-Wen Guo, Shenzhen, CN;
Xiao-Long Zhou, Tianjin, CN;
Zhen-Zhu Zhang, Shenzhen, CN;
Ke-Feng You, Shenzhen, CN;
Jian-Fei Wang, Tianjin, CN;
Miao Zhang, Tianjin, CN;
Fulian Precision Electronics (Tianjin) Co., LTD., Tianjin, CN;
Abstract
A method of automatic identification of PCIe configuration of a server and preventing operation if each slimline connector connected with a PCIe device is found connected to an incorrect slot of a mother board utilizes a combination of first and second signals of two null interfaces of the first connector as that ID signal and a combination of third and fourth signals of the two interfaces of a second connector as that ID signal. The CPLD receiving the ID signals detects whether the first and second slimline connectors are in their specified and correct slots. Powering on of computer is not permitted if incorrect connection is found, and a warning prompt is generated. A PCIe channel width for each slimline is automatically configured if no incorrect connection is found. A server applying the method is also disclosed.