The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2023

Filed:

Aug. 23, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Gary L. Howe, Allen, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G11C 11/00 (2006.01); G06F 3/06 (2006.01); G11C 11/408 (2006.01); G11C 11/4096 (2006.01); G11C 7/10 (2006.01); B24D 18/00 (2006.01); B32B 3/30 (2006.01); B32B 13/06 (2006.01); E21B 10/567 (2006.01); E21B 10/573 (2006.01); G11C 11/4076 (2006.01); G11C 8/12 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); B24D 18/0009 (2013.01); B32B 3/30 (2013.01); B32B 13/06 (2013.01); E21B 10/567 (2013.01); E21B 10/5735 (2013.01); G06F 3/0604 (2013.01); G06F 3/0673 (2013.01); G11C 7/109 (2013.01); G11C 7/1045 (2013.01); G11C 11/4087 (2013.01); G11C 11/4096 (2013.01); B32B 2307/308 (2013.01); B32B 2307/554 (2013.01); B32B 2307/558 (2013.01); B32B 2307/704 (2013.01); G11C 8/12 (2013.01); G11C 11/4076 (2013.01); Y10T 428/24479 (2015.01); Y10T 428/24612 (2015.01); Y10T 428/26 (2015.01);
Abstract

A memory device may include one or more memory banks that store data and one or more input buffers. The input buffers may receive command address signals to access the one or more memory banks. The memory device may operate in one of a first mode of operation or a second mode of operation. The one or more input buffers may operate under a first bias current when the memory device is in the first mode of operation or a second bias current when the memory device is in the second mode of operation, and the first bias current may be greater than the second bias current.


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