The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2023

Filed:

Apr. 07, 2022
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Hirotaka Tsuda, Tokyo, JP;

Yusuke Oshiki, Mie, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H10B 43/27 (2023.01); H01L 21/311 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01); H01L 29/792 (2006.01); H10B 43/10 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 29/66833 (2013.01); H01L 29/7926 (2013.01); H10B 43/10 (2023.02); H01L 21/31144 (2013.01);
Abstract

According to one embodiment, a method for manufacturing a semiconductor memory device includes simultaneously forming a plurality of first holes and a plurality of second holes in a stacked body. The stacked body includes a plurality of first layers and a plurality of second layers. The method includes etching a portion between the second holes next to each other in the stacked body, and connecting at least two or more second holes to form a groove. The method includes forming a film including a charge storage film on a sidewall of the first holes. The method includes forming a channel film on a sidewall of the film including the charge storage film.


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