The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 29, 2023
Filed:
Feb. 16, 2021
Samsung Electronics Co., Ltd., Suwon-si, KR;
Bu-Seop Jung, Hwaseong-si, KR;
Bum-Jib Kim, Suwon-si, KR;
Jung-Hun Lee, Suwon-si, KR;
Hye-Jung Bang, Seoul, KR;
Soon-Ho Lee, Seoul, KR;
Young-Kow Lee, Suwon-si, KR;
Ki-Yeong Jeong, Chungcheongnam-do, KR;
Nam-Ju Cho, Yongin-si, KR;
Doo-Suk Kang, Suwon-si, KR;
Hyuk Kang, Yongin-si, KR;
Bo-Kun Choi, Seoul, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
An electronic device and a power control method of an electronic device are provided. The electronic device may include: a communication circuit including a first circuit configured to perform first communication and a second circuit configured to perform second communication; a processor electrically connected to the communication circuit; and a memory electrically connected to the processor, wherein, the memory stores instructions that, when executed, cause the processor to perform operations comprising: controlling the first circuit to operate according to a first power control mode associated with the first communication, and controlling the second circuit to operate according to a second power control mode associated with the second communication when the first communication and the second communication are concurrently performed through the first circuit and the second circuit; identifying a first sleep period during which the first circuit operates in a sleep mode according to the first power control mode, and a second sleep period during which the second circuit operates in the sleep mode according to the second power control mode; and controlling the communication circuit to operate in a deep sleep mode in which the communication circuit operates with power that is less than or equal to a predetermined power in a period where the first sleep period and the second sleep period coincide.