The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2023

Filed:

Mar. 24, 2022
Applicant:

Proteantecs Ltd., Haifa, IL;

Inventors:

Eyal Fayneh, Givatayim, IL;

Edi Shmueli, Nesher, IL;

Alexander Burlak, Mountain Lakes, NJ (US);

Evelyn Landman, Haifa, IL;

Inbar Weintrob, Givat-Ada, IL;

Yahel David, Kibbutz Gazit, IL;

Shai Cohen, Haifa, IL;

Guy Redler, Haifa, IL;

Assignee:

PROTEANTECS LTD., Haifa, IL;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2853 (2013.01);
Abstract

An integrated circuit (IC) comprising: a margin measurement circuit configured to monitor multiple data paths of the IC and to output, at different times, different ranges of remaining margins of the multiple data paths; a workload sensor configured to output a value representing aggregate operational stress experienced by the IC over a period of time ending at each of the different times; and a processor configured to: (i) compute, based on the value output by said workload sensor, an upper bound and a lower bound of change of the remaining margin of the IC, and (ii) compute upper and lower bounds of a current remaining margin of the IC, based on (a) the upper and lower bounds of change, and (b) a remaining margin indicated by a border between two adjacent ranges outputted by the margin measurement circuit.


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