The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2023

Filed:

Oct. 25, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Chan-Sic Yoon, Suwon-si, KR;

Dongoh Kim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/762 (2006.01); H10B 12/00 (2023.01); H01L 21/8238 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 27/092 (2013.01); H01L 21/76224 (2013.01); H01L 21/823481 (2013.01); H01L 21/823828 (2013.01); H10B 12/09 (2023.02);
Abstract

A semiconductor device includes a substrate having a first region and a second region. A device isolation layer is disposed in the substrate between the first region and the second region. The device isolation layer includes a buried dielectric layer in a trench that is recessed from a top surface of the substrate. A first liner layer is between the trench and the buried dielectric layer. A semiconductor layer is disposed on a top surface of the substrate of the first region. A first gate pattern is disposed on the semiconductor layer. A protrusion is disposed on a top surface of the device isolation layer.


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