The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2023

Filed:

Jan. 09, 2020
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Keitaro Ichikawa, Tokyo, JP;

Taketoshi Shikano, Tokyo, JP;

Yuji Shikasho, Tokyo, JP;

Fumihito Kawahara, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/4842 (2013.01); H01L 23/49861 (2013.01);
Abstract

Provided are a power semiconductor device using a lead frame, in which deformation and bending of terminals is suppressed, insulation is secured between terminals, and mounting onto a control board is facilitated, and a manufacturing method thereof. A package in which a semiconductor element mounted on a lead frame is sealed, terminals being bent and exposed from side surfaces of the package, and, a terminal bending portion being a portion bent in each of the terminals, a width thereof being larger than a width of a tip of the terminal, and being equal to or smaller than the width of a contact portion of the terminal in contact with the package are provided; therefore, deformation and bending of the terminals is suppressed, a necessary insulation is secured between the adjacent terminals, and mounting onto a control board is facilitated.


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