The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2023

Filed:

Jul. 28, 2021
Applicant:

Qromis, Inc., Santa Clara, CA (US);

Inventors:

Vladimir Odnoblyudov, Danville, CA (US);

Dilip Risbud, San Jose, CA (US);

Ozgur Aktas, Pleasanton, CA (US);

Cem Basceri, Los Gatos, CA (US);

Assignee:

Qromis, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 21/683 (2006.01); H01L 21/762 (2006.01); H01L 29/861 (2006.01); H01L 21/285 (2006.01); H01L 21/18 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 21/48 (2006.01); H01L 29/10 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); C30B 25/18 (2006.01); C30B 29/06 (2006.01); C30B 29/40 (2006.01); H01L 29/872 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6835 (2013.01); C30B 25/183 (2013.01); C30B 29/06 (2013.01); C30B 29/406 (2013.01); H01L 21/0242 (2013.01); H01L 21/0254 (2013.01); H01L 21/0257 (2013.01); H01L 21/02428 (2013.01); H01L 21/02458 (2013.01); H01L 21/18 (2013.01); H01L 21/28264 (2013.01); H01L 21/28587 (2013.01); H01L 21/4807 (2013.01); H01L 21/762 (2013.01); H01L 29/1033 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/4175 (2013.01); H01L 29/4236 (2013.01); H01L 29/42376 (2013.01); H01L 29/66143 (2013.01); H01L 29/66204 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01); H01L 29/7787 (2013.01); H01L 29/861 (2013.01); H01L 29/8613 (2013.01); H01L 29/872 (2013.01); H01L 29/1066 (2013.01); H01L 29/402 (2013.01); H01L 2221/6835 (2013.01); H01L 2221/68345 (2013.01);
Abstract

An integrated circuit device includes an engineered substrate including a substantially single crystal layer and a buffer layer coupled to the substantially single crystal layer. The integrated circuit device also includes a plurality of semiconductor devices coupled to the buffer layer. The plurality of semiconductor devices can include a first power device coupled to a first portion of the buffer layer and a second power device coupled to a second portion of the buffer layer. The first power device includes a first channel region comprising a first end, a second end, and a first central portion disposed between the first end and the second end. The second power device includes a second channel region comprising a third end, a fourth end, and a second central portion disposed between the third end and the fourth end.


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