The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2023

Filed:

Oct. 27, 2021
Applicant:

Dell Products L.p., Round Rock, TX (US);

Inventors:

Ching-Lung Chao, Austin, TX (US);

Hsin-Chieh Wang, Taoyuan, TW;

Hung-Tah Wei, Round Rock, TX (US);

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0815 (2016.01); G06F 12/02 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0815 (2013.01); G06F 9/5016 (2013.01); G06F 12/0284 (2013.01); G06F 2212/1032 (2013.01);
Abstract

A sub-Non-Uniform Memory Access (sub-NUMA) clustering fault resilient memory system includes an initialization subsystem that is coupled to a processing system and a memory system. The initialization subsystem determines that the processing system and the memory system are configured to provide a plurality of NUMA nodes, allocates a respective portion of the memory system to each of the plurality of NUMA nodes, and configures each respective portion of the memory system to mirror a mirrored subset of that respective portion of the memory system. Subsequently, respective data that is utilized by each of the plurality of NUMA nodes provided by the processing system and the memory system and that is stored in the mirrored subset of the respective portion of the memory system allocated to that NUMA node is mirrored in that respective portion of the memory system.


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