The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2023

Filed:

Nov. 08, 2019
Applicants:

Shanghai Jiao Tong University, Shanghai, CN;

National University of Singapore, Singapore, SG;

Inventors:

Boxiao Liu, Shanghai, CN;

Yong Lian, Shanghai, CN;

Lei Zeng, Singapore, SG;

Chun Huat Heng, Singapore, SG;

Assignees:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
A61B 5/0536 (2021.01);
U.S. Cl.
CPC ...
A61B 5/0536 (2013.01);
Abstract

An electrical impedance tomography system with frequency division multiplexing based data compression comprising electrodes, a connecting line, an electrical impedance tomography chip, a universal serial bus and a computer. The present invention realizes the proposed electrical impedance tomography system by innovative application of frequency division multiplexing technology, and has the advantages of low power consumption and improved hardware overheads. The architecture of the 13-channel electrical impedance tomography chip introduced in the embodiment of the present invention, which applies the frequency division multiplexing based data compression technology, has taped out using CMOS 0.13 micrometer process; the power consumption per channel turns out to be 118 microwatts and the area is 0.87 square millimeters, verifying the effectiveness of the present invention. The present invention can also be migrated to other applications of electrical impedance tomography.


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