The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

Dec. 11, 2018
Applicant:

Secure-ic Sas, Cesson-Sevigne, FR;

Inventors:

Florent Lozac'h, Trappes-en-Yvelines, FR;

Sylvain Guilley, Paris, FR;

Assignee:

SECURE-IC SAS, Cesson-Sevigne, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 9/06 (2006.01); H04L 9/32 (2006.01);
U.S. Cl.
CPC ...
H04L 9/0618 (2013.01); H04L 9/3278 (2013.01);
Abstract

A circuit includes a cipher accessing a plurality of read-write memory units configured to handle data tables obtained from a modified mask; wherein the modified mask is being determined from an initial mask and a random value, the random value selecting one or more modifications of the initial mask amongst a plurality of predefined modifications including permutation operations. Developments of the invention describe the use of mathematically optimal or equivalent masks; the use of random values; a range of permutation operations comprising offset shifting and/or rotation and/or XOR operations and/or coprime construction; the use of round masks; the use of a Physically Unclonable Function; the refresh or update of modified masks and/or round masks; and verifications of the optimality and/or integrity of masks. System features (e.g. CPU, co-processor, local and/or remotely accessed external memory storing masks, volatile memory) and computer program products are described.


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