The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

Sep. 30, 2021
Applicant:

Akoustis, Inc., Huntersville, NC (US);

Inventors:

Ramakrishna Vetury, Charlotte, NC (US);

Alexander Y. Feldman, Huntersville, NC (US);

Michael D. Hodge, Belmont, NC (US);

Art Geiss, Greensboro, NC (US);

Shawn R. Gibb, Huntersville, NC (US);

Mark D. Boomgarden, Huntersville, NC (US);

Michael P. Lewis, Charlotte, NC (US);

Pinal Patel, Charlotte, NC (US);

Jeffrey B. Shealy, Davidson, NC (US);

Assignee:

Akoustis, Inc., Huntersville, NC (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04R 17/00 (2006.01); H03H 3/02 (2006.01); H03H 9/02 (2006.01); H03H 9/05 (2006.01); H03H 9/10 (2006.01); H03H 9/13 (2006.01); H03H 9/56 (2006.01); H03H 3/04 (2006.01); H03H 9/17 (2006.01);
U.S. Cl.
CPC ...
H03H 3/02 (2013.01); H03H 3/04 (2013.01); H03H 9/02118 (2013.01); H03H 9/0514 (2013.01); H03H 9/1035 (2013.01); H03H 9/131 (2013.01); H03H 9/132 (2013.01); H03H 9/133 (2013.01); H03H 9/171 (2013.01); H03H 9/174 (2013.01); H03H 9/564 (2013.01); H03H 9/568 (2013.01); H03H 2003/0414 (2013.01); H03H 2003/0428 (2013.01);
Abstract

A method of manufacture for an acoustic resonator or filter device. In an example, the present method can include forming metal electrodes with different geometric areas and profile shapes coupled to a piezoelectric layer overlying a substrate. These metal electrodes can also be formed within cavities of the piezoelectric layer or the substrate with varying geometric areas. Combined with specific dimensional ratios and ion implantations, such techniques can increase device performance metrics. In an example, the present method can include forming various types of perimeter structures surrounding the metal electrodes, which can be on top or bottom of the piezoelectric layer. These perimeter structures can use various combinations of modifications to shape, material, and continuity. These perimeter structures can also be combined with sandbar structures, piezoelectric layer cavities, the geometric variations previously discussed to improve device performance metrics.


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