The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

Sep. 03, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Seok Hoon Kim, Suwon-si, KR;

Dong Myoung Kim, Suwon-si, KR;

Dong Suk Shin, Yongin-si, KR;

Seung Hun Lee, Hwaseong-si, KR;

Cho Eun Lee, Pocheon-si, KR;

Hyun Jung Lee, Hwaseong-si, KR;

Sung Uk Jang, Hwaseong-si, KR;

Edward Nam Kyu Cho, Seongnam-si, KR;

Min-Hee Choi, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/768 (2006.01); H01L 21/02 (2006.01); H01L 29/423 (2006.01); H01L 29/165 (2006.01); H01L 27/088 (2006.01); H01L 29/08 (2006.01); H01L 29/49 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7855 (2013.01); H01L 21/02532 (2013.01); H01L 21/76871 (2013.01); H01L 21/823431 (2013.01); H01L 27/0886 (2013.01); H01L 29/0847 (2013.01); H01L 29/165 (2013.01); H01L 29/4232 (2013.01); H01L 29/6656 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/02645 (2013.01); H01L 27/1211 (2013.01); H01L 29/4966 (2013.01); H01L 29/66545 (2013.01);
Abstract

A semiconductor device includes a first fin type pattern on a substrate, a second fin type pattern, parallel to the first fin type pattern, on the substrate, and an epitaxial pattern on the first and second fin type patterns. The epitaxial pattern may include a shared semiconductor pattern on the first fin type pattern and the second fin type pattern. The shared semiconductor pattern may include a first sidewall adjacent to the first fin type pattern and a second sidewall adjacent to the second fin type pattern. The first sidewall may include a first lower facet, a first upper facet on the first lower facet and a first connecting curved surface connecting the first lower and upper facets. The second sidewall may include a second lower facet, a second upper facet on the second lower facet and a second connecting curved surface connecting the second lower and upper facets.


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