The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

Jun. 29, 2021
Applicant:

Hua Hong Semiconductor (Wuxi) Limited, Wuxi, CN;

Inventors:

Dong Zhang, Wuxi, CN;

Peng Huang, Wuxi, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14689 (2013.01); H01L 21/76831 (2013.01); H01L 21/76832 (2013.01); H01L 27/14636 (2013.01); H01L 27/14685 (2013.01);
Abstract

A method for forming contacts applied to a CMOS image sensor includes: forming a transmission gate structure; performing source and drain ion implantation processes to form source and drain; forming auxiliary sidewalls on the outer sides of the gate sidewalls, the material of the auxiliary sidewalls being the same as the material of the adjacent gate sidewalls; sequentially forming a silicide block layer, a contact etch stop layer and an interlayer dielectric layer; defining source and drain contact regions; performing etching processes to remove the interlayer dielectric layer and the contact etch stop layer corresponding to the source and drain contact regions sequentially; etching the silicide block layer by adopting a predetermined etching selection ratio to form source and drain contacts, wherein the etching rate of the silicide block layer is higher than the etching rate of the auxiliary sidewalls in the process of etching the silicide block layer.


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