The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

May. 13, 2021
Applicants:

Biswajit Ray, Madison, AL (US);

Umeshwarnath Surendranathan, Huntsville, AL (US);

Preeti Kumari, Huntsville, AL (US);

MD Raquibuzzaman, Huntsville, AL (US);

Inventors:

Biswajit Ray, Madison, AL (US);

Umeshwarnath Surendranathan, Huntsville, AL (US);

Preeti Kumari, Huntsville, AL (US);

Md Raquibuzzaman, Huntsville, AL (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/02 (2006.01); G11C 29/50 (2006.01); G11C 29/38 (2006.01); G11C 29/44 (2006.01);
U.S. Cl.
CPC ...
G11C 29/021 (2013.01); G11C 29/38 (2013.01); G11C 29/44 (2013.01); G11C 29/50 (2013.01);
Abstract

A system for testing memory includes logic that is configured to perform various normal memory operations (e.g., erase, read and write operations) on a memory device and to determine operational parameters associated with the memory operations. As an example, the amount of time to perform one or more memory operations may be measured, a number of errors resulting from the memory operations may be determined, or a number of memory cells storing noisy bits may be identified. One or more of the operational parameters may then be analyzed to determine whether they are in a range expected for counterfeit or defective memory. If so, the logic determines that the memory under test is counterfeit or defective and provides a notification about such determination.


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