The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

Sep. 03, 2019
Applicant:

Arm Limited, Cambridge, GB;

Inventor:
Assignee:

Arm Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/54 (2013.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 21/55 (2013.01); G06F 21/64 (2013.01); G06F 21/74 (2013.01);
U.S. Cl.
CPC ...
G06F 21/54 (2013.01); G06F 9/30101 (2013.01); G06F 9/3861 (2013.01); G06F 21/554 (2013.01); G06F 21/556 (2013.01); G06F 21/64 (2013.01); G06F 21/74 (2013.01);
Abstract

An apparatus comprises: processing circuitry to perform data processing in one of a plurality of security domains including at least a secure domain and a less secure domain, and memory access checking circuitry to check whether a memory access is allowed depending on security attribute data indicating which domain is associated with a target address. In response to a given change of program flow from processing in the less secure domain to a target instruction having an address associated with the secure domain: a fault is triggered when the target instruction is an instruction other than a gateway instruction indicating a valid entry point to the secure domain. When the target instruction is said gateway instruction, a stack pointer verifying action is triggered to verify whether it is safe to use a selected stack pointer stored in a selected stack pointer register.


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