Selectable register file blocks for hardware threads of a multithreaded processor

Abstract

Embodiments of a multithreaded processor and a method of assigning blocks of register files for hardware threads of multithreaded processors are disclosed. In an embodiment, the method includes providing a multithreaded processor with a register file that provides registers for T hardware threads, the register file being organized as a set of B blocks, where each of the B blocks contains N registers and where B is greater than or equal to T, configuring assignments of the B blocks to the T hardware threads such that at least one of the B blocks of the register file and not more than R/N of the B blocks of the register file is assigned to each of the T hardware threads, where R is the number of registers defined by the instruction set architecture of the multithreaded processor and where R/N is an integer, thereby the multithreaded processor supports the T hardware threads with the register file that has less than T×R registers, and executing machine instructions on the multithreaded processor, where register numbers in the machine instructions are translated into register file addresses using the configured assignments.