The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

Apr. 15, 2022
Applicant:

Dell Products L.p., Hopkinton, MA (US);

Inventors:

Aric Hadav, Tel Aviv, IL;

Thomas N. Dibb, Rutland, MA (US);

Amitai Alkalay, Kadima, IL;

Assignee:

Dell Products L.P., Hopkinton, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 13/10 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0613 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 13/102 (2013.01);
Abstract

Techniques providing connectivity between a CPU and physical storage devices (PDs) can use a loop back path formed between two connectors of an extended PO slot when an extended I/O card is inserted therein. The two connectors can include a first connector having connectivity with the CPU over a first set of lanes, and a second connector having connectivity with the PDs over a second set of lanes. While the extended I/O card is inserted into the I/O slot, connectivity can be provided between the CPU and the PDs using connectivity provided between the CPU and the first connector and the first set of lanes; using the loop back path provided between the first and second connectors; and using connectivity provided between the second connector and the PDs over the second set of lanes.


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