The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2023

Filed:

Mar. 21, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sanghoon Ahn, Suwon-si, KR;

Oik Kwon, Suwon-si, KR;

Jeonghee Park, Suwon-si, KR;

Kihyun Hwang, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10N 50/10 (2023.01); H10B 61/00 (2023.01); H10B 63/00 (2023.01); H10N 50/01 (2023.01); H10N 50/85 (2023.01); H10N 70/00 (2023.01);
U.S. Cl.
CPC ...
H10N 50/10 (2023.02); H10B 61/00 (2023.02); H10B 63/80 (2023.02); H10N 50/01 (2023.02); H10N 50/85 (2023.02); H10N 70/063 (2023.02); H10N 70/068 (2023.02); H10N 70/841 (2023.02); H10N 70/882 (2023.02);
Abstract

A variable resistance memory device is provided including a plurality of lower electrodes disposed on a substrate. A plurality of variable resistors are disposed on the plurality of lower electrodes. A plurality of upper electrodes are disposed on the plurality of variable resistors. An interlayer insulating layer fills a space in the plurality of variable resistors. An anti-oxidation layer is disposed between the plurality of variable resistors and the interlayer insulating layer. The anti-oxidation layer covers side surfaces of the plurality of variable resistors, and the anti-oxidation layer comprises silicon and/or carbon.


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