The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 08, 2023
Filed:
Jun. 30, 2021
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventors:
Yeon Seung Jung, Icheon-si, KR;
Jong Hoon Kim, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2023.01); H01L 23/48 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 23/367 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 25/165 (2013.01); H01L 23/3128 (2013.01); H01L 23/367 (2013.01); H01L 23/481 (2013.01); H01L 23/49811 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 23/5389 (2013.01);
Abstract
A semiconductor package includes a package substrate, a plurality of memory stacks, at least one processor chip and one or more heat dissipation structures. The memory stacks are disposed on the package substrate. The memory stacks are spaced apart from each other by a predetermined distance. The processor chip is disposed on the memory stacks to be partially overlapped with each of the memory stacks. The heat dissipation structure is disposed on the upper surfaces of the memory stacks.