The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2023

Filed:

Jul. 29, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Daejeong Kim, Seoul, KR;

Namhyung Kim, Seoul, KR;

Dohan Kim, Hwaseong-si, KR;

Deokho Seo, Suwon-si, KR;

Wonjae Shin, Seoul, KR;

Insu Choi, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G11C 29/42 (2006.01); G11C 29/50 (2006.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G11C 29/42 (2013.01); G06F 11/1068 (2013.01); G11C 29/50004 (2013.01); G11C 2029/5004 (2013.01);
Abstract

A memory device includes a memory cell array and a test controller. The memory cell array includes a plurality of memory cells, where the memory cell array is divided into multiple regions. The test controller is configured to perform a parallel bit test (PBT) on the plurality of memory cells, where the test controller selects fail data including a fail data bit among internal data output from the multiple regions during the PBT, and outputs the fail data via a data input/output signal line to the outside of the memory device.


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