The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2023

Filed:

Sep. 26, 2022
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Jae Sung Yu, Paju-si, KR;

Jae Hoon Park, Paju-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/3291 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3291 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0291 (2013.01); G09G 2330/021 (2013.01);
Abstract

A gate driving circuit and a display device including the same are disclosed. The gate driving circuit includes signal transmitters receiving a start pulse, a shift clock, a charge/discharge clock, a back-bias clock, a high-potential driving voltage, and a low-potential reference voltage, and connected in a cascade structure. An Nth (N is a positive integer) signal transmitter of the signal transmitters includes a first control node; a second control node; a first controller controlling charging and discharging of the first control node by using at least one transistor to which the back-bias clock is inputted; a second controller controlling charging and discharging of the second control node; a first output buffer outputting a carry pulse in response to voltages of the first and second control nodes; and a second output buffer outputting a gate pulse.


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