The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2023

Filed:

May. 21, 2019
Applicant:

Nippon Telegraph and Telephone Corporation, Tokyo, JP;

Inventors:

Syuhei Yoshida, Tokyo, JP;

Yuta Ukon, Tokyo, JP;

Koji Yamazaki, Tokyo, JP;

Koyo Nitta, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05B 19/4097 (2006.01);
U.S. Cl.
CPC ...
G05B 19/4097 (2013.01); G05B 2219/31338 (2013.01);
Abstract

An optimum combination of a loop unrolling number and a circuit parallel number in a high-level synthesis is determined. A circuit synthesis information generation unit sets, as parameter candidates, a plurality of combinations of a loop unrolling number and a circuit parallel number to generate circuit synthesis information indicating a synthesis circuit obtained by high-level synthesis processing for each of the combinations. An optimum parameter determination unit calculates, for each piece of the generated circuit synthesis information, an estimation processing performance related to the synthesis circuit indicated by the circuit synthesis information, and determines an optimum combination of the loop unrolling number and the circuit parallel number based on the circuit synthesis information based on which a maximum estimation processing performance is obtained.


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