The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2023

Filed:

Jun. 08, 2021
Applicant:

Kes Systems, Inc., Tempe, AZ (US);

Inventors:

Ballson Gopal, Tempe, AZ (US);

Jesse Killion, Atlanta, GA (US);

Assignee:

KES SYSTEMS, INC., Tempe, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 1/04 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2874 (2013.01); G01R 1/0458 (2013.01); G01R 1/0466 (2013.01); G01R 31/2862 (2013.01); G01R 31/2863 (2013.01); G01R 31/2867 (2013.01);
Abstract

A method and apparatus for conducting burn-in testing of semiconductors is provided. A semiconductor device under test (DUT) with a plurality of contact pads is placed into a seal carrier. The seal carrier is then placed within a plurality of first inner walls of an outer housing of a burn-in testing apparatus that is fastened to a cold plate through a printed circuit board (PCB). The seal carrier has a plurality of second inner walls that define a recessed cavity. A lid is placed over the seal carrier and fastened to the outer housing to seal the recessed cavity. The recessed cavity is pneumatically pressurized to force the contact pads of the semiconductor DUT into electrical contact with a plurality of resiliently compressible pins of a socket of the PCB. The socket is then energized to conduct a burn-in test of the semiconductor DUT.


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