The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2023

Filed:

Dec. 29, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Woocheol Shin, Seoul, KR;

Myunggil Kang, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/06 (2006.01); H01L 21/02 (2006.01); H01L 49/02 (2006.01); H01L 29/06 (2006.01); H01L 29/786 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0629 (2013.01); H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 28/20 (2013.01); H01L 29/0673 (2013.01); H01L 29/41733 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01);
Abstract

A resistor includes a substrate including an active region protruding from an upper surface of the substrate and extending in a first horizontal direction, a doped region extending in the first horizontal direction on the active region and comprising a semiconductor layer with n-type impurities, a plurality of channel layers spaced apart from each other in a vertical direction on the active region and connected to the doped region, a first gate electrode and a second gate electrode extending in the second horizontal direction intersecting the first horizontal direction and surrounding the plurality of channel layers, a first contact plug and a second contact plug in contact with an upper surface of the doped region. The first contact plug is adjacent to the first gate electrode. The second contact plug is adjacent to the second gate electrode.


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