The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2023

Filed:

Jul. 15, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sungmin Hwang, Hwaseong-si, KR;

Jiwon Kim, Seoul, KR;

Jaeho Ahn, Seoul, KR;

Joonsung Lim, Seongnam-si, KR;

Sukkang Sung, Seongnam-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2017.01); H01L 23/31 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5223 (2013.01); H01L 23/5226 (2013.01); H01L 23/5227 (2013.01); H01L 23/5228 (2013.01); H01L 24/20 (2013.01); H01L 24/24 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 2224/2105 (2013.01); H01L 2224/24146 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01); H10B 43/27 (2023.02);
Abstract

A semiconductor device includes lower circuit patterns on a lower substrate; lower bonding patterns on the lower circuit patterns, the lower bonding patterns including a conductive material and being electrically connected to the lower circuit patterns; upper bonding patterns on and contacting the lower bonding patterns, and including a conductive material; a passive device on the upper bonding patterns, and including a conductive material and contacting one of the upper bonding patterns; a gate electrode structure on the passive device, and including gate electrodes spaced apart from each other in a first direction, each of which extends in a second direction, and extension lengths in the second direction of the gate electrodes increasing from a lowermost level toward an uppermost level in a stepwise manner; a channel extending through at least a portion of the gate electrode structure; and an upper substrate on the channel.


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