The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2023

Filed:

Dec. 31, 2020
Applicant:

Motivo, Inc., Sunnyvale, CA (US);

Inventors:

Vito Dai, Santa Clara, CA (US);

Edward Kah Ching Teoh, San Jose, CA (US);

Ji Xu, San Jose, CA (US);

Bharath Rangarajan, Sunnyvale, CA (US);

Assignee:

Motivo, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/30 (2020.01); G06F 30/392 (2020.01); G06F 30/18 (2020.01); G06F 30/33 (2020.01); G06F 30/39 (2020.01); G06F 30/327 (2020.01); G06F 30/398 (2020.01); G06F 30/00 (2020.01); G06F 30/13 (2020.01); G06F 119/18 (2020.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/18 (2020.01); G06F 30/327 (2020.01); G06F 30/33 (2020.01); G06F 30/39 (2020.01); G06F 30/398 (2020.01); G06F 30/00 (2020.01); G06F 30/13 (2020.01); G06F 2119/18 (2020.01);
Abstract

In an embodiment, a method for optimizing an integrated circuit physical design for an integrated circuit. A physical design graph includes a plurality of physical design sub-configurations, each including a placement of a group of physical cells and having annotated characteristics. The method includes identifying, in the integrated circuit physical design, a first physical design sub-configuration including a first placement of a first group of the physical cells and having first annotated characteristics, the first annotated characteristics being outside target characteristics. The method includes selecting from the physical design graph, based on the first group of the physical cells and the target characteristics, at least a second physical design sub-configuration including a second placement of the first group of the physical cells and being within the target characteristics. The method includes replacing the first physical design sub-configuration in the integrated circuit physical design with the second physical design sub-configuration.


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