The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2023

Filed:

Jun. 29, 2020
Applicants:

Huawei Technologies Co., Ltd., Shenzhen, CN;

Wuxi Wio Technologies Co., Ltd., Wuxi, CN;

Inventors:

Yiwen Chen, Dongguan, CN;

Zhaoxing Huang, Wuxi, CN;

Danyang Yao, Shenzhen, CN;

Hong Tang, Wuxi, CN;

Chendi Jiang, Wuhan, CN;

Huikai Xie, Wuxi, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81B 3/00 (2006.01); B81B 7/00 (2006.01); B81B 7/02 (2006.01); G02B 26/08 (2006.01);
U.S. Cl.
CPC ...
B81B 7/02 (2013.01); B81B 3/0081 (2013.01); B81B 3/0083 (2013.01); B81B 2201/042 (2013.01); B81B 2201/045 (2013.01); B81B 2203/0323 (2013.01); G02B 26/0866 (2013.01);
Abstract

This application discloses a MEMS chip structure, including a substrate, a side wall, a dielectric plate, a MEMS micromirror array, and a grid array, where the MEMS micromirror array includes a plurality of grooves and a plurality of MEMS micromirrors. The plurality of MEMS micromirrors are in a one-to-one correspondence with the plurality of grooves. The grid array is located above the MEMS micromirror array, and a lower surface of the grid array is connected to upper surfaces of side walls of at least some of the plurality of grooves.


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