The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2023

Filed:

Jul. 28, 2021
Applicant:

Dell Products L.p., Round Rock, TX (US);

Inventors:

Lynn Kong, Shanghai, CN;

Jason Pritchard, Hopkinton, MA (US);

Raymond Pavlak, Jr., Shrewsbury, MA (US);

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 3/10 (2006.01); H01P 3/08 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0218 (2013.01); H01P 3/081 (2013.01); H05K 1/0219 (2013.01); H05K 1/0245 (2013.01); H05K 3/10 (2013.01); H05K 2201/09036 (2013.01);
Abstract

A printed circuit board of an information handling system includes a dielectric layer, adjacent differential pairs, a ground layer, and a ground wall. The adjacent differential pairs are plated on the dielectric layer, and generate crosstalk between each other. The ground wall is in physical communication with and electrically coupled to the ground layer. The ground wall extends substantially perpendicular from the ground layer through the dielectric layer. A top surface of the ground wall is a specific height above a top surface of the adjacent different pairs. The ground wall suppresses the generated crosstalk based on the specific height and a width of the ground wall.


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