The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2023

Filed:

Dec. 03, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hong-Sil Jeong, Suwon-si, KR;

Kyung-Joong Kim, Seoul, KR;

Se-ho Myung, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 1/00 (2006.01); H03M 13/11 (2006.01); H03M 13/15 (2006.01); H03M 13/25 (2006.01); H03M 13/29 (2006.01); H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
H04L 1/0041 (2013.01); H03M 13/1102 (2013.01); H03M 13/1165 (2013.01); H03M 13/152 (2013.01); H03M 13/253 (2013.01); H03M 13/255 (2013.01); H03M 13/2906 (2013.01); H03M 13/618 (2013.01); H04L 1/0057 (2013.01);
Abstract

A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups each of which is formed of a same number of bits, determine whether a number of the outer-encoded bits satisfies a predetermined number of bits required according to at least one of a code rate and a code length for Low Density Parity Check (LDPC) encoding, pads zero bits to some of the bits in the bit groups if the number of the outer-encoded bits is less than the predetermined number of bits, and maps the outer-encoded bits to remaining bits in the bit groups, based on a predetermined shortening pattern, thereby to constitute LDPC information bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the some of the bits, in which zero bits are padded, are included in some of the bit groups which are not sequentially disposed in the LDPC information bits.


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