The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2023

Filed:

Jan. 05, 2022
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventor:

Paolo Novellini, Gorgonzola, IT;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/081 (2006.01); G06F 13/42 (2006.01); H03K 19/21 (2006.01); H03L 7/08 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0812 (2013.01); G06F 13/423 (2013.01); H03K 19/21 (2013.01); H03L 7/0807 (2013.01);
Abstract

Methods and apparatus for quickly changing line rates in PCIe analyzers without resetting the receivers. One example circuit for multi-rate reception generally includes: a receiver having a data input, a data output, and a clock input configured to receive a clock signal from a clock generator, the receiver being configured to switch between receiving data at a first data rate and at least one second data rate and to sample data according to the first data rate, wherein the first data rate is higher than the at least one second data rate; a phase detector having an input coupled to the data output of the receiver; and a filter having an input coupled to an output of the phase detector and having an output configured to effectively control a phase of the sampling by the receiver when the data is at the at least one second data rate.


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