The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2023
Filed:
Jun. 09, 2021
University of Florida Research Foundation, Incorporated, Gainesville, FL (US);
University of Central Florida Research Foundation, Inc., Orlando, FL (US);
Yier Jin, Gainesville, FL (US);
Shaojie Zhang, Orlando, FL (US);
James Geist, Oviedo, FL (US);
Travis Meade, Orlando, FL (US);
Jason Liam Portillo, San Jose, CA (US);
UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INCORPORATED, Gainesville, FL (US);
Abstract
Embodiments herein provide for reverse engineering of integrated circuits (ICs) for design verification. In example embodiments, an apparatus receives a gate-level netlist for an integrated circuit (IC), generates a list of equivalence classes related to signals included in the gate-level netlist, determines control signals of the gate-level netlist based at least in part on the list of equivalence classes, determines a logic flow of a finite state transducer (FST) based at least in part on the control signals, and generates register transfer level (RTL) source code for the IC based on the FST.