The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2023

Filed:

Aug. 31, 2021
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Rohit Natarajan, Sunnyvale, CA (US);

Jurgen M. Schulz, Pleasanton, CA (US);

Christopher D. Shuler, Davis, CA (US);

Rohit K. Gupta, Santa Clara, CA (US);

Thomas T. Zou, Millbrae, CA (US);

Srinivasa Rangan Sridharan, Santa Clara, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/0802 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0802 (2013.01); G06F 2212/60 (2013.01);
Abstract

An apparatus includes a cache controller circuit and a cache memory circuit that further includes cache memory having a plurality of cache lines. The cache controller circuit may be configured to receive a request to reallocate a portion of the cache memory circuit that is currently in use. This request may identify an address region corresponding to one or more of the cache lines. The cache controller circuit may be further configured, in response to the request, to convert the one or more cache lines to directly-addressable, random-access memory (RAM) by excluding the one or more cache lines from cache operations.


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