The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2023
Filed:
May. 27, 2021
Applicant:
Kioxia Corporation, Tokyo, JP;
Inventor:
Shuichi Watanabe, Fujisawa, JP;
Assignee:
Kioxia Corporation, Tokyo, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0604 (2013.01); G06F 3/0635 (2013.01); G06F 3/0673 (2013.01); G06F 3/061 (2013.01); G06F 3/0679 (2013.01);
Abstract
According to one embodiment, a controller of a memory system executes communication with a host in conformity with a standard of NVM express. When fetching a command from a first submission queue, the controlled of the memory system determine the number of commands to be fetched with the number of free slots among a plurality of slots included in a first completion queue as an upper limit. The controller fetches the determined number of commands from the first submission queue.
Watanabe, Shuichi. (2023). Memory system limiting fetching from host submission queue based on free space of corresponding completion queue and control method thereof (U.S. Patent No. 11704065). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11704065
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile