The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2023

Filed:

Nov. 01, 2021
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Mizuki Shirao, Tokyo, JP;

Seiki Nakamura, Tokyo, JP;

Kiyotomo Hasegawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01J 1/04 (2006.01); G01J 1/42 (2006.01); H05K 1/14 (2006.01);
U.S. Cl.
CPC ...
G01J 1/0403 (2013.01); G01J 1/0411 (2013.01); G01J 1/42 (2013.01); H05K 1/147 (2013.01);
Abstract

A metal stem includes a cylindrical portion in which an FPC inserting portion is formed, and a base standing upright from one plane of the cylindrical portion. A tubular lens cap with one open end is fixed to a peripheral portion of the one plane of the cylindrical portion, and has a lens mounted on a bottomed portion. A substrate mounted on one plane of the base includes a signal wiring layer and a ground wiring layer. An optical semiconductor element is mounted on the substrate and has a signal terminal connected to the signal wiring layer of the substrate, and a ground terminal connected to the ground wiring layer of the substrate. An FPC substrate is disposed so as to pass through the FPC inserting portion and to face the one plane of the base. The FPC substrate includes a signal wiring layer connected to the signal wiring layer of the substrate with a metal wire.


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