The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2023

Filed:

Sep. 15, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Sami Rosenblatt, White Plains, NY (US);

Jared Barney Hertzberg, Yorktown Heights, NY (US);

Rasit Onur Topaloglu, Poughkeepsie, NY (US);

Markus Brink, White Plains, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H10N 69/00 (2023.01); H10N 60/01 (2023.01); G01R 33/035 (2006.01); H03K 19/195 (2006.01); H10N 60/12 (2023.01); H10N 60/80 (2023.01);
U.S. Cl.
CPC ...
H10N 69/00 (2023.02); H10N 60/0912 (2023.02); G01R 33/0354 (2013.01); H03K 19/195 (2013.01); H10N 60/12 (2023.02); H10N 60/805 (2023.02);
Abstract

Techniques related to vertical silicon-on-metal superconducting quantum interference devices and method of fabricating the same are provided. Also provided are associated flux control and biasing circuitry. A superconductor structure can comprise a silicon-on-metal substrate that can comprise a first superconducting layer, comprising a first superconducting material, between a first crystalline silicon layer and a second crystalline silicon layer. The superconducting structure can also comprise a first via comprising a first Josephson junction and a second via comprising a second Josephson junction. The first via and the second via can be formed between the first superconducting layer and a second superconducting layer, comprising a second superconducting material. An electrical loop around a defined area of the second crystalline silicon layer can comprise the first via comprising the first Josephson junction, the second via comprising the second Josephson junction, the first superconducting layer, and the second superconducting layer.


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