The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2023
Filed:
Oct. 25, 2021
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Kangyeop Choo, Hwaseong-si, KR;
Insung Kim, Hwaseong-si, KR;
Wooseok Kim, Suwon-si, KR;
Taeik Kim, Seongnam-si, KR;
Sunghyuck Lee, Hwaseong-si, KR;
Chanyoung Jeong, Hwaseong-si, KR;
Assignee:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/089 (2006.01); H03L 7/10 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0891 (2013.01); H03L 7/101 (2013.01);
Abstract
A phased locked loop includes; a load circuit that generates an output signal in response to a driving voltage, a frequency calibration circuit that generates a calibration signal in response to an output frequency of the output signal and a target frequency, and a regulator that generates the driving voltage in response to the calibration signal.