The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2023
Filed:
Nov. 16, 2021
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
Yong Sang Park, Gyeonggi-do, KR;
Joo Young Kim, Gyeonggi-do, KR;
Min Soo Lim, Gyeonggi-do, KR;
Min Su Park, Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 8/06 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1069 (2013.01); G11C 7/109 (2013.01); G11C 7/1063 (2013.01); G11C 7/1096 (2013.01); G11C 8/06 (2013.01);
Abstract
A memory device includes a memory cell array and a peripheral circuit. The memory cell array includes a plurality of memory regions each identified by a row address and a column address. The peripheral circuit accesses the memory cell array by performing, based on an address, a burst length and a burst address gap provided from a memory controller, a burst operation supporting a variable burst address gap. The burst address gap is a numerical difference between adjacent column addresses, on which the burst operation is to be performed.