The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2023

Filed:

Mar. 01, 2018
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Yusuke Yachide, Tokyo, JP;

Masami Kato, Sagamihara, JP;

Yoshinori Ito, Tokyo, JP;

Takahisa Yamamoto, Kawasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 3/06 (2006.01); G06N 3/063 (2023.01); G06N 3/04 (2023.01); G06N 3/045 (2023.01);
U.S. Cl.
CPC ...
G06N 3/063 (2013.01); G06N 3/04 (2013.01); G06N 3/045 (2023.01);
Abstract

To allow arithmetic processing using a plurality of processing nodes to be executed with a smaller memory size, an arithmetic processing apparatus for executing processing using a hierarchical type network formed by the plurality of processing nodes, comprises: a storage unit configured to store a parameter used by each of the plurality of processing nodes for arithmetic processing and a calculation result of the arithmetic processing in each of the plurality of processing nodes; and a buffer control unit configured to switch, based on a configuration of the hierarchical type network, a buffer system of the parameter and the calculation result in the storage unit in at least one layer of the hierarchical type network.


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