The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2023

Filed:

Dec. 22, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jieun Ahn, Seongnam-si, KR;

Sungcheol Park, Seoul, KR;

Kiseok Bae, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01); G06F 1/12 (2006.01); H03K 3/037 (2006.01); H03K 19/20 (2006.01); G06F 1/06 (2006.01); H03K 5/01 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
G06F 1/12 (2013.01); G06F 1/06 (2013.01); H03K 3/037 (2013.01); H03K 5/01 (2013.01); H03K 19/20 (2013.01); H03K 2005/00013 (2013.01);
Abstract

Provided is an integrated circuit. The integrated circuit includes a plurality of clock generators configured to respectively generate a plurality of clock signals, a plurality of logic circuits configured to operate in synchronization with the plurality of clock signals, and controller circuitry configured to identify meta-stability information based on frequencies of the plurality of clock signals, and configured to control at least one clock generator so that at least one of the plurality of clock signals is randomly delayed in response to the meta-stability information.


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