The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2023
Filed:
May. 31, 2021
Arm Limited, Cambridge, GB;
Paul Nicholas Whatmough, Cambridge, MA (US);
Zhi-Gang Liu, Westford, MA (US);
Supreet Jeloka, Austin, TX (US);
Saurabh Pijuskumar Sinha, Schertz, TX (US);
Matthew Mattina, Boylston, MA (US);
Arm Limited, Cambridge, GB;
Abstract
Various implementations described herein are directed to a device having a multi-layered logic structure with a first logic layer and a second logic layer arranged vertically in a stacked configuration. The device may have a memory array that provides data, and also, the device may have an inter-layer data bus that vertically couples the memory array to the multi-layered logic structure. The inter-layer data bus may provide multiple data paths to the first logic layer and the second logic layer for reuse of the data provided by the memory array.