The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2023

Filed:

Apr. 05, 2022
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Philip Allan Kraus, San Jose, CA (US);

Joseph R. Johnson, Redwood City, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81C 1/00 (2006.01); H01L 21/02 (2006.01); G01N 33/487 (2006.01); G01N 27/49 (2006.01); H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
B81C 1/00087 (2013.01); G01N 27/49 (2013.01); G01N 33/48721 (2013.01); H01L 21/0228 (2013.01); H01L 21/302 (2013.01);
Abstract

Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays thereof. In one aspect, methods for manufacturing nanopores and arrays thereof exploit a physical seam. One or more etch pits are formed in a topside of a substrate and one or more trenches, which align with the one or more etch pits, are formed in a backside of the substrate. An opening is formed between the one or more etch pits and the one or more trenches. A dielectric material is then formed over the substrate to fill the opening. Contacts are then disposed on the topside and the backside of the substrate and a voltage is applied from the topside to the backside, or vice versa, through the dielectric material to form a nanopore. In another aspect, the nanopore is formed at or near the center of the opening at a seam, which is formed in the dielectric material.


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