The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2023

Filed:

Mar. 09, 2021
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, KR;

Inventors:

Sang Min Lee, Suwon-si, KR;

Young Il Cho, Suwon-si, KR;

Jong Seok Na, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 21/4857 (2013.01); H01L 23/49838 (2013.01); H01L 23/49816 (2013.01); H01L 23/49866 (2013.01); H01L 23/49894 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/10175 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73257 (2013.01);
Abstract

A printed circuit board includes a first insulating layer; an external connection pad embedded in a first surface of the first insulating layer and having a first externally exposed surface disposed at substantially the same level as the first surface of the first insulating layer; a second insulating layer disposed on a second surface of the first insulating layer and having a first surface in contact with the second surface of the first insulating layer; and a first wiring pattern embedded in the second insulating layer and exposed from the first surface of the second insulating layer to be in contact with a second externally exposed surface of the external connection pad opposing the first externally exposed surface.


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