The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2023
Filed:
Feb. 26, 2021
Applicant:
Frampton E. Ellis, Jasper, FL (US);
Inventor:
Frampton E. Ellis, Jasper, FL (US);
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/71 (2013.01); G06F 21/50 (2013.01); G06F 21/85 (2013.01); H04L 9/40 (2022.01); G06F 11/20 (2006.01);
U.S. Cl.
CPC ...
H04L 63/02 (2013.01); G06F 11/2043 (2013.01); G06F 21/50 (2013.01); G06F 21/71 (2013.01); G06F 21/85 (2013.01); H04L 63/0209 (2013.01);
Abstract
A method for a computer or microchip with one or more inner hardware-based access barriers or firewalls that establish one or more private units disconnected from a public unit or units having connection to the public Internet and one or more of the private units have a connection to one or more non-Internet-connected private networks for private network control of the configuration of the computer or microchip using active hardware configuration, including field programmable gate arrays (FPGA). The hardware-based access barriers include a single out-only bus and/or another in-only bus with a single on/off switch.