The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2023

Filed:

Mar. 31, 2021
Applicant:

Versa Networks, Inc., San Jose, CA (US);

Inventors:

Kapil Bajaj, Fremont, CA (US);

Apurva Mehta, Cupertino, CA (US);

Assignee:

VERSA NETWORKS, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 1/00 (2006.01); H04L 12/28 (2006.01); H04L 43/0829 (2022.01); H04L 43/16 (2022.01); H04L 43/0888 (2022.01); H04L 43/0894 (2022.01); H04L 43/0882 (2022.01);
U.S. Cl.
CPC ...
H04L 1/0089 (2013.01); H04L 12/2854 (2013.01); H04L 43/0829 (2013.01); H04L 43/0882 (2013.01); H04L 43/0888 (2013.01); H04L 43/0894 (2013.01); H04L 43/16 (2013.01);
Abstract

Embodiments herein disclose conditioning traffic through multiple data paths of a Software-Defined Wide Area Network (SD-WAN). Some embodiments include monitoring available paths through an SD-WAN to reach a destination node, determining a quality score for packets to the destination node on a first path of the available paths, sending a data packet sequence to the destination node on the first path, generating a forward error correction (FEC) packet for the packet sequence, and sending the FEC packet to the destination node on a second path of the available paths in response to the quality score being less than a quality threshold.


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