The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2023

Filed:

Oct. 14, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Changbo Lee, Anyang-si, KR;

Kwanhoo Son, Yongin-si, KR;

Joon Seok Oh, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 24/20 (2013.01); H01L 21/566 (2013.01); H01L 21/6835 (2013.01); H01L 21/76871 (2013.01); H01L 23/315 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/19 (2013.01); H01L 2221/68359 (2013.01); H01L 2224/214 (2013.01);
Abstract

Disclosed are semiconductor devices and methods of fabricating the same. The method comprises providing a carrier substrate that includes a conductive layer, placing a semiconductor die on the carrier substrate, forming an insulating layer to cover the semiconductor die on the carrier substrate, forming a via hole to penetrate the insulating layer at a side of the semiconductor die and to expose the conductive layer of the carrier substrate, performing a plating process in which the conductive layer of the carrier substrate is used as a seed to form a via filling the via hole, forming a first redistribution layer on a first surface of the semiconductor die and the insulating layer, removing the carrier substrate, and forming a second redistribution layer on a second surface of the semiconductor die and the insulating layer, the first surface and the second surface being located opposite each other.


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