The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2023

Filed:

Jul. 01, 2022
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Ju-Won Yoon, Suwon-si, KR;

Gun Hee Kim, Seoul, KR;

Sang Ho Park, Hwaseong-si, KR;

Seung Chan Lee, Hwaseong-si, KR;

Joo Hee Jeon, Hwaseong-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3258 (2016.01); G09G 3/3266 (2016.01); G09G 3/3291 (2016.01); H01L 27/32 (2006.01); H01L 51/52 (2006.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3258 (2013.01); G09G 3/3233 (2013.01); G09G 3/3266 (2013.01); G09G 3/3291 (2013.01); H01L 27/3258 (2013.01); H01L 27/3265 (2013.01); H01L 27/3276 (2013.01); H01L 51/5253 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2320/0233 (2013.01);
Abstract

An organic light emitting diode display includes: a substrate; an overlapping layer on the substrate; a pixel on the substrate and the overlapping layer; and a scan line, a data line, a driving voltage line, and an initialization voltage line that are connected to the pixel. The pixel includes: an organic light emitting diode; a second transistor connected to the scan line and the data line; a driving transistor including a gate electrode, an input terminal, and an output terminal, and to apply a current to the organic light emitting diode from the output terminal; and a voltage application transistor to apply a voltage to the overlapping layer. An output of the second transistor is connected to the input terminal of the driving transistor, and the overlapping layer is between the driving transistor and the substrate while overlapping with the driving transistor on a plane.


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