The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2023

Filed:

Dec. 14, 2021
Applicant:

Pony Ai Inc., Grand Cayman, KY;

Inventors:

Yubo Zhang, Los Gatos, CA (US);

Pingfan Meng, Dublin, CA (US);

Assignee:

Pony AI Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0811 (2016.01); G06F 12/0846 (2016.01); G06F 12/1045 (2016.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0811 (2013.01); G06F 12/0292 (2013.01); G06F 12/0851 (2013.01); G06F 12/1045 (2013.01); G06F 2212/40 (2013.01);
Abstract

Described herein is a memory architecture that is configured to dynamically determine an address encoding to use to encode multi-dimensional data such as multi-coordinate data in a manner that provides a coordinate bias corresponding to a current memory access pattern. The address encoding may be dynamically generated in response to receiving a memory access request or may be selected from a set of preconfigured address encodings. The dynamically generated or selected address encoding may apply an interleaving technique to bit representations of coordinate values to obtain an encoded memory address. The interleaving technique may interleave a greater number of bits from the bit representation corresponding to the coordinate direction in which a coordinate bias is desired than from bit representations corresponding to other coordinate directions.


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