The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2023

Filed:

Mar. 24, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jong-Hyun Seok, Seoul, KR;

Gyu Chae Lee, Seoul, KR;

Jeong Hyeon Cho, Hwaseong-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H01L 25/18 (2023.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
H05K 1/181 (2013.01); H01L 25/18 (2013.01); H05K 1/117 (2013.01); H05K 2201/09227 (2013.01); H05K 2201/09509 (2013.01); H05K 2201/10159 (2013.01); H05K 2201/10522 (2013.01); H05K 2201/10545 (2013.01); H05K 2201/10734 (2013.01);
Abstract

A semiconductor chip module includes a PCB including first and second faces; a buffer on the first face; a first chip on the first face, and including a first connection terminal and a second connection terminal, a first signal being provided to the first connection terminal, and a second signal being provided to the second connection terminal; a second chip on the second face, and including a third connection terminal to which the first signal is provided, and a fourth connection terminal to which the second signal is provided. The first connection terminal and the third connection terminal receive the first signal from the buffer at the same time. The first connection terminal be is closer to the buffer as compared with the second connection terminal. The third connection terminal is closer to the buffer as compared with the fourth connection terminal.


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